sram_sp_hse_8kx8.pdf

Precise Optimization for TSMC’s Six-Layer Metal 0.18μm CL018G CMOS Process • High Density (area is 0.496mm2) • Fast Access Time (1.51ns at fast@0C process, 1.98V, 0 ̊C) • Fast Cycle Time (1.51ns at fast@0C process, 1.98V, 0 ̊C) • One Read/Write Port • Completely Static Operation • Near-Zero Hol