SN54HC563, SN74HC563,pdf(OCTAL

These 8-bit transparent D-type latches feature 3-state outputs designed specifically for driving highly capaciTIve or relaTIvely low-impedance loads. They are parTIcularly suitable for implemenTIng buffer registers, I/O ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the outputs are latched at the inverses of the levels set up at the D inputs.

A buffered output-enable (OE)\ input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.