ds1wm
delivery
doc
DS1WM_Datasheet.pdf
118KB
release_notes.pdf
83KB
verification
verilog_src
tests
scratchpad_integrity
stimulus.inc
2KB
nc_rundir
design_verilog_src_files.lst
275B
run.csh
623B
cds.lib
94B
tb_src_files.lst
306B
ncsim.key
5B
hdl.var
38B
design_vhdl_src_files.lst
270B
probe.tcl
90B
README
621B
multi_ow_network
stimulus.inc
1KB
nc_rundir
design_verilog_src_files.lst
275B
run.csh
641B
cds.lib
94B
tb_src_files.lst
306B
ncsim.key
5B
hdl.var
38B
design_vhdl_src_files.lst
270B
probe.tcl
90B
README
654B
single_search_rom
stimulus.inc
983B
nc_rundir
design_verilog_src_files.lst
275B
run.csh
623B
cds.lib
94B
tb_src_files.lst
306B
ncsim.key
5B
hdl.var
38B
design_vhdl_src_files.lst
270B
probe.tcl
90B
README
597B
cmd_recognition
stimulus.inc
11KB
nc_rundir
design_verilog_src_files.lst
275B
run.csh
623B
cds.lib
94B
tb_src_files.lst
306B
ncsim.key
5B
hdl.var
38B
design_vhdl_src_files.lst
270B
probe.tcl
90B
README
613B
testbench
ow_slave
ow_slave.v
2KB
iox.v
12KB
cmd_ctrl.v
8KB
scoreboard
scoreboard.v
6KB
cpu_bfm
cpu_bfm.v
20KB
clkgen
clkgen.v
3KB
tb_ds1wm
tc_ds1wm.v
2KB
tb_ds1wm.v
844B
design
verilog_src
ds1wm
clk_prescaler.v
5KB
onewiremaster.v
50KB
one_wire_interface.v
13KB
ds1wm.v
4KB
clk_prescaler_dcm.v
5KB
one_wire_io.v
2KB
vhdl_src
ds1wm
ds1wm.vhd
14KB
clk_prescaler_dcm.vhd
5KB
one_wire_io.vhd
3KB
one_wire_interface.vhd
15KB
onewiremaster.vhd
59KB
clk_prescaler.vhd
8KB
README
998B
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