A 10Gb/s CMOS Clock and Data Recovery Circuit

weixin_13567 62 0 pdf文档 2019-09-28 19:09:01

Thispaperdescribesthedesignofthefirst10-Gb/sCMOSclockanddatarecovery(CDR)circuit.Alinearphasedetector(PD)isintroducedthatcomparesthephaseoftheincomingdatawiththatofahalf-rateclock.TheCDRcircuitalsoincorporatesathree-stageinterpolatingringoscillatortoachieveawidetuningrange.

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A 10Gb/s CMOS Clock and Data Recovery Circuit

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