基于FPGA信号有效值测量(vivado工程)
通过AD对输入信号进行采样,在FPGA(xilinx Artix7系列)内部通过计算功率得出信号有效值,通过UART发送给上位机。
文件列表
基于FPGA信号有效值测量(vivado工程)
(预估有个1153文件)
9069359dddbb00181a55900dc832e822
3KB
6063cba9dfbb00181439cc0265a267c6
4KB
50385a44ddbb00181a55900dc832e822
3KB
00cf6155ddbb00181a55900dc832e822
3KB
808bc788dfbb00181a55900dc832e822
4KB
60088283d7bb00181a55900dc832e822
2KB
90c48ff9dfbb00181439cc0265a267c6
4KB
70bc6b10debb00181a55900dc832e822
3KB
40344a6adbbb00181a55900dc832e822
3KB
3076a333dcbb00181a55900dc832e822
3KB
暂无评论