用vhdl语言编写！此数字钟是动态显示！大家可根据此报告来理解！
vhdl 数字钟
(预估有个438文件)
24jinzhi.fnsim.cdb
3KB
shi24.bsf
2KB
clock.bdf
10KB
clock.pre_map.cdb
3KB
clock.sgdiff.cdb
3KB
clock.rtlv_sg.cdb
3KB
clock.(0).cnf.cdb
3KB
yima47.bsf
2KB
jinzhi4.bsf
2KB
saomiao.bsf
2KB
shi24.bsf
2KB
mux441.bsf
2KB
miao60.bsf
2KB
miao60.(3).cnf.cdb
3KB
miao60.bsf
2KB
yima.fnsim.cdb
2KB
yima.pre_map.cdb
3KB
yima.sgdiff.cdb
3KB
yima.(0).cnf.cdb
3KB
yima.rtlv_sg.cdb
3KB
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