使用Xilinx ZynqMP-SoC ultra96 FPGA的SoC加速器 从AXI-Lite到AXI-Full 作者:Minh Quang Tran和Nguyen Tien Dat Tran 主题:使用Xilinx Ultra96 FPGA加速图像处理领域的运营商 任务1有两个文件: 1_bitsteam file: Bitstream of MysteryReg IP core 2_mmap file: Test the MysteryReg IP core by reading and writing 4 registers of MysteryReg 任务2有4个文件夹: 1_MUL_AXI: AXI Multiplier implemented in Bluespec language 2_Bitstream: Bitstream of the the IP cor