LSClock_version_4_2.zip
/** Project name : Clock; Data : 2020 April 2; Function : A clock for millisecond precision, 4 keys modify Clock parameter; KEY0 is pause key under running mode and add one under settings mode KEY1 is right key under settings mode KEY2 is lift key under settings mode KEY3 is set key Hardware : DE2-115; Development environment : Quartus II 15.0; FPGA type: EP4CE115F29C7; System frequency : 50MHz; Company : Author : Hardware simulation : Modification record : */
文件列表
LSClock_version_4_2.zip
(预估有个34文件)
LSClock_version_4_2
output_files
digital_tube.v.bak
61B
db
LSClock.db_info
140B
LSClock.sld_design_entry.sci
270B
key_vibration.v
1KB
Key_Controller.v.bak
7KB
key_vibration.v.bak
1004B
LSClock.qws
1KB
暂无评论