介绍CPLD和FPGA的数字电路设计
Preface....6
Chapter 1: Common Number Systems and Conversions Overview..8
Overview...8
1.1 Decimal, Binary, Octal, and Hexadecimal Systems8
1.2 Binary, Octal, and Hexadecimal to Decimal Conversions10
1.3 Decimal to Binary, Octal, and Hexadecimal Conversions11
1.4 Binary-Octal-Hexadecimal Conversions...14
1.5 Summary....16
1.6 Exercises....17
1.7 Solutions to End-of-Chapter Exercises.....21
Chapter 2: Operations in Binary, Octal, and Hexadecimal Systems22
Overview.22
2.1 Binary System Operations22
2.2 Octal System Operations24
2.3 Hexadecimal System Operations.....26
2.4 Complements of Numbers28
2.5 Subtraction with Tens- and Twos-Complements...31
2.6 Subtraction with Nines- and Ones-Complements.33
2.7 Summary....35
2.8 Exercises....36
Chapter 3: Sign Magnitude and Floating Point Arithmetic.....45
Overview.45
3.1 Signed Magnitude of Binary Numbers......45
3.2 Floating Point Arithmetic.46
3.3 Summary....52
3.4 Exercises....53
Chapter 4: Binary Codes57
Overview.57
4.1 Encoding....57
4.2 The American Standard Code for Information Interchange (ASCII) Code.....62
4.3 The Extended Binary Coded Decimal Interchange Code (EBCDIC)....64
4.4 Parity Bits....64
4.5 Error Detecting and Correcting Codes......65
4.6 Cyclic Codes.66
4.7 Summary....69
4.8 Exercises....71
Chapter 5: Fundamentals of Boolean Algebra.73
Overview.73
5.1 Basic Logic Operations..73
5.2 Fundamentals of Boolean Algebra...73
5.3 Truth Tables.74
5.4 Summary....76
5.5 Exercises....77
Chapter 6: Minterms and Maxterms80
Overview.80
6.1 Minterms....80
6.2 Maxterms...81
6.3 Conversion from One Standard Form to Another.82
6.4 Properties of Minterms and Maxterms......83
6.5 Summary....87
6.6 Exercises....88
Chapter 7: Combinational Logic Circuits.92
Overview.92
7.1 Implementation of Logic Diagrams from Boolean Expressions...92
7.2 Obtaining Boolean Expressions from Logic Diagrams.....98
7.3 Input and Output Waveforms..99
7.4 Karnaugh Maps..101
7.5 Design of Common Logic Circuits109
7.6 Summary..135
7.7 Exercises..136
Chapter 8: Sequential Logic Circuits......152
Overview.152
8.1 Introduction to Sequential Circuits152
8.2 Set-Reset (SR) Flip Flop152
8.3 Data (D) Flip Flop.156
8.4 JK Flip Flop157
8.5 Toggle (T) Flip Flop.....158
8.6 Flip Flop Triggering.....159
8.7 Edge-Triggered Flip Flops....159
8.8 Master/Slave Flip Flops.160
8.9 Conversion from One Type of Flip Flop to Another161
8.10 Analysis of Synchronous Sequential Circuits...164
8.11 Design of Synchronous Counters.171
8.12 Registers.176
8.13 Ring Counters..180
8.14 Ring Oscillators183
8.15 Summary.183
8.16 Exercises186
Chapter 9: Memory Devices..201
Overview.201
9.1 Random-Access Memory (RAM)..201
9.2 Read-Only Memory (ROM)..203
9.3 Programmable Read-Only Memory (PROM).....206
9.4 Erasable Programmable Read-Only Memory (EPROM)207
9.5 Electrically-Erasable Programmable Read-Only Memory (EEPROM).207
9.6 Flash Memory....207
9.7 Memory Sticks...208
9.8 Cache Memory...208
9.9 Virtual Memory..209
9.10 Scratch Pad Memory..210
9.11 Summary.210
9.12 Exercises211
Chapter 10: Advanced Arithmetic and Logic Operations......214
Overview.214
10.1 Computers Defined....214
10.2 Basic Digital Computer System Organization and Operation...215
10.3 Parallel Adder...217
10.4 Serial Adder......218
10.5 Overflow Conditions..219
10.6 High-Speed Addition and Subtraction...222
10.7 Binary Multiplication.224
10.8 Binary Division226
10.9 Logic Operations of the ALU227
10.10 Other ALU Functions.228
10.11 Summary.228
10.12 Exercises.229
Chapter 11: Introduction to Field Programmable Devices...237
Overview.237
11.1 Programmable Logic Arrays (PLAs).....237
11.2 Programmable Array Logic (PAL).241
11.3 Complex Programmable Logic Devices (CPLDs).242
11.4 Field Programmable Gate Arrays (FPGAs)266
11.5 FPGA Block Configuration-Xilinx FPGA Resources...278
11.6 The CPLD versus FPGA Trade-Off......284
11.7 What is Next.....285
11.8 Summary.287
11.9 Exercises288
Appendix A: Introduction to ABEL Hardware Description Language296
Overview.296
A.1 Introduction......296
A.2 Basic Structure of an ABEL Source File296
Appendix B: Introduction to VHDL.299
Overview.299
B.1 Introduction......299
B.2 The VHDL Design Approach.299
B.3 VHDL as a Programming Language......301
B.4 Structural Description..325
B.5 Behavioral Description333
B.6 Organization......341
Appendix C: Introduction to Verilog.351
Overview.351
C.2 Verilog Applications....351
C.3 The Verilog Programming Language......351
C.4 Lexical Conventions....355
C.5 Program Structure.356
C.6 Data Types358
C.7 Operators.360
C.8 Control Statements......365
C.9 Other Statements367
C.10 System Tasks...369
C.11 Functions371
C.12 Timing Control372
Appendix D: Introduction to Boundary Scan Architecture....374
Overview.374
D.1 The IEEE Standard 1149.1...374
D.2 Introduction......374
D.3 Boundary Scan Applications376
D.4 Board with Boundary-Scan Components..377
D.5 Field Service Boundary-Scan Applications.378
References and Suggestions for Further Study379
Overview.379