CD4027CD4027BMCD4027BCDualJ-KMasterSlaveFlip-FlopwithSetandResetFebruary1988CD4027BMCD4027BCDualJ-KMasterSlaveFlip-FlopwithSetandResetGeneralDescriptionFeaturesThesedualJ-Kflip-flopsaremonolithiccomplementaryYWidesupplyvoltagerange30Vto15VMOS(CMOS)integratedcircuitsconstructedwithN-andP-YHighnoiseimmunity045VDD(typ)channelenhancementmodetransistorsEachflip-
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