A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ACT7802 is a 1024-word by 18-bit FIFO for high-speed applicaTIons. It processes data in a bit-parallel format at rates up to 40 MHz and access TImes of 30 ns.
Data is written into the FIFO memory on a low-to-high transiTIon on the load-clock (LDCK) input and is read out on a low-to-high transiTIon on the unload-clock (UNCK) input. The memory is full when the number of words clocked in exceeds by 1024 the number of words clocked out. When the memory is full, LDCK has no effect on the data in the memory; when the memory is empty, UNCK has no effect.
A low level on the reset (RESET\) input resets the FIFO internal clock stack pointers and sets full (FULL\) high, almost full/almost empty (AF/AE) high, half full (HF) low, and empty (EMPTY\) low.
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