register_array.zip
(预估有个86文件)
register_array
register_array.ip_user_files
README.txt
129B
register_array.srcs
sim_1
new
tb.v
717B
tb_regfile.v
1KB
sources_1
new
regfile.v
979B
register_array.v
1KB
register_array.sim
sim_1
behav
xsim
compile.sh
802B
register_array.tcl
449B
tb_regfile.tcl
449B
simulate.sh
802B
xsim.ini
39B
glbl.v
2KB
xvlog.log
0B
simulate.log
24B
elaborate.log
559B
compile.log
0B
xvlog.pb
16B
tb_behav.wdb
16KB
tb_regfile_behav.wdb
15KB
tb_regfile_vlog.prj
289B
xelab.pb
997B
xsim.dir
register_array_behav
xsim.rlx
724B
obj
xsim_1.lnx64.o
5KB
xsim_1.c
5KB
xsim_0.lnx64.o
13KB
xsimk
22KB
xsim.mem
3KB
xsim.type
24B
xsimkernel.log
331B
xsim.xdbg
1KB
xsim.dbg
9KB
Compile_Options.txt
221B
xsim.rtti
190B
TempBreakPointFile.txt
28B
xsim.svtype
47B
xsim.reloc
1KB
xsimSettings.ini
1KB
xsimcrash.log
0B
tb_behav
xsim.rlx
663B
obj
xsim_1.lnx64.o
6KB
xsim_1.c
6KB
xsim_0.lnx64.o
20KB
xsimk
31KB
xsim.mem
4KB
xsim.type
24B
xsimkernel.log
307B
xsim.xdbg
3KB
xsim.dbg
11KB
Compile_Options.txt
197B
xsim.rtti
190B
TempBreakPointFile.txt
28B
xsim.svtype
47B
xsim.reloc
2KB
xsimSettings.ini
1KB
xsimcrash.log
0B
xil_defaultlib
register_array.sdb
4KB
tb_regfile.sdb
4KB
tb.sdb
3KB
regfile.sdb
3KB
xil_defaultlib.rlx
859B
glbl.sdb
5KB
tb_regfile_behav
xsim.rlx
703B
obj
xsim_1.lnx64.o
5KB
xsim_1.c
6KB
xsim_0.lnx64.o
16KB
xsimk
26KB
xsim.mem
3KB
xsim.type
24B
xsimkernel.log
322B
xsim.xdbg
6KB
xsim.dbg
9KB
Compile_Options.txt
213B
xsim.rtti
323B
TempBreakPointFile.txt
28B
xsim.svtype
109B
xsim.reloc
2KB
xsimSettings.ini
1KB
xsimcrash.log
0B
register_array_behav.wdb
9KB
elaborate.sh
962B
tb.tcl
449B
register_array.xpr
11KB
register_array.hw
register_array.lpr
284B
register_array.cache
sim
ssm.db
528B
compile_simlib
riviera
vcs
xcelium
activehdl
questa
wt
xsim.wdf
252B
project.wpc
58B
synthesis.wdf
6KB
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