These quadruple 2-input posiTIve-OR gates are designed for 2-V to 5.5-V VCC operaTIon.

The ’LV32A devices perform the Boolean funcTIon Y = A + B or Y = (A\ • B\)\ in posiTIve logic.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

SN54LV32A,SN74LV32A,pdf(QUADRU

SN54LV32A,SN74LV32A,pdf(QUADRU