SDR SDRAM Controller

SDR SDRAM ControllerWhite PaperSDR SDRAM ControllerIntroductionThe single data rate(SDR)synchronous dynamic random access memory(SDRAM)controller provides a simplifiedinterface to industry standard SDR SDRAM.The SDR SDRAM Controller is available in either Verilog HDL orVHDL and is optimized forthe Altera APEX architecture.The SDR SDRAM Controller supports the followingfeatures:■Burst lengths of1,2,4,or8data words■CAS latency of2or3clock cycles■16-bit programmable refresh counter used forautomatic refresh■2-chip selects forSDRAM devices■Supports the NOP,READA,WRITEA,AUTO_REF