基于FPGA的RISC-V模型机芯片设计

sensation_65827 8 0 zip 2024-04-26 08:04:50

采用FPGA技术，构建了RISC-V架构的模型机，实现20条基本运算指令。该模型机包含运算器、存储器、寄存器堆和控制器，并提供源代码和仿真代码。

适用人群

- 掌握数字电路基础

- 正在学习计算机组成原理

- 具备Vivado软件使用经验

文件列表

基于FPGA的芯片设计，RISC-V模型机设计（R型、I型、U型基本运算指令，共20条） (预估有个580文件)

vivado_19508.backup.jou 919B

hw.xml 791B

.xsim_webtallk.info 59B

RIU_CPU_Reduced.lpr 343B

IM_stub.vhdl 1KB

IM_stub.v 1KB

IM_sim_netlist.v 28KB

IM_sim_netlist.vhdl 42KB

IM.dcp 28KB

3cdd6847b2188a56.xci 13KB

DM_stub.v 1KB

stats.txt 55B

DM_sim_netlist.v 28KB

DM_sim_netlist.vhdl 43KB

DM.dcp 35KB

DM_stub.vhdl 2KB

3b8bdf5b0c6d5248.xci 13KB

DM_stub.v 1KB

DM_sim_netlist.v 28KB

DM_sim_netlist.vhdl 43KB

a402b8bf24c6f63f.xci 13KB

DM.dcp 35KB

DM_stub.vhdl 2KB

DM_stub.v 1KB

DM_sim_netlist.v 28KB

DM_sim_netlist.vhdl 43KB

DM.dcp 35KB

12a1d46aa1fe0483.xci 13KB

DM_stub.vhdl 2KB

DM_stub.v 1KB

stats.txt 55B

DM_sim_netlist.v 28KB

DM_sim_netlist.vhdl 43KB

0ea65b4e4427b7da.xci 13KB

DM.dcp 35KB

DM_stub.vhdl 2KB

IM_stub.vhdl 1KB

7a2fa51b2df7d70e.xci 13KB

IM_stub.v 1KB

IM_sim_netlist.v 28KB

IM_sim_netlist.vhdl 42KB

IM.dcp 28KB

IM_stub.vhdl 1KB

c77b31bf888e517d.xci 13KB

stats.txt 55B

IM_stub.v 1KB

IM_sim_netlist.v 28KB

IM_sim_netlist.vhdl 42KB

IM.dcp 29KB

DM_stub.v 1KB

4e1501fafff8a12a.xci 13KB

DM_sim_netlist.v 28KB

DM_sim_netlist.vhdl 43KB

DM.dcp 35KB

DM_stub.vhdl 2KB

IM_stub.vhdl 1KB

IM_stub.v 1KB

IM_sim_netlist.v 28KB

IM_sim_netlist.vhdl 42KB

IM.dcp 28KB

f756a0b52708f2ea.xci 13KB

DM_stub.v 1KB

DM_sim_netlist.v 28KB

DM_sim_netlist.vhdl 43KB

DM.dcp 35KB

b8e6f47fac4348a6.xci 13KB

DM_stub.vhdl 2KB

xsim.wdf 256B

java_command_handlers.wdf 3KB

webtalk_pa.xml 9KB

project.wpc 123B

gui_handlers.wdf 10KB

synthesis_details.wdf 100B

synthesis.wdf 5KB

compile.bat 840B

webtalk_3876.backup.log 1KB

xsim.ini 23KB

elaborate.bat 946B

glbl.v 1KB

xvlog.log 0B

webtalk_3876.backup.jou 923B

simulate.log 676B

elaborate.log 800B

compile.log 0B

webtalk.jou 924B

IM.mif 528B

webtalk_27040.backup.log 1KB

RIU_CPU_top_vlog.prj 1KB

xsim.ini.bak 23KB

xvlog.pb 16B

DM.mif 891B

RIUS_data.coe 308B

RIU_CPU_sim_vlog.prj 1KB

RIU_CPU_sim.tcl 460B

webtalk.log 1KB

xelab.pb 1KB

simulate.bat 807B

RIU_CPU_sim_behav.wdb 175KB

@f_@register.sdb 921B

@p@c.sdb 1KB

@d@m.sdb 7KB

@i@d1.sdb 4KB

@r@i@u_@c@p@u_sim.sdb 2KB

@i@m.sdb 6KB

@register_heap.sdb 3KB

@c@u.sdb 9KB

@a@l@u.sdb 3KB

@r@i@u_@c@p@u.sdb 7KB

@f@r_@register.sdb 880B

@p@c0.sdb 1KB

@b_@register.sdb 931B

xil_defaultlib.rlx 4KB

@a_@register.sdb 931B

@i@d2.sdb 5KB

@m@d@r.sdb 910B

@i@r.sdb 1KB

glbl.sdb 4KB

xsimk.exe 242KB

xsim.rlx 813B

xsim_1.win64.obj 13KB

xsim_1.c 17KB

xsim_0.win64.obj 207KB

xsim.mem 31KB

xsim.type 24B

xsimkernel.log 328B

xsim.xdbg 93KB

xsim.dbg 152KB

Compile_Options.txt 289B

xsim.rtti 380B

.xsim_webtallk.info 65B

TempBreakPointFile.txt 29B

xsim.svtype 120B

xsim.reloc 26KB

xsimSettings.ini 1KB

xsimcrash.log 0B

webtalk_27040.backup.jou 924B

ip.coe 209B

vivado_25352.backup.log 3KB

IM.mif 891B

vivado_19508.backup.log 6KB

vivado_3996.backup.jou 2KB

blk_mem_gen_v8_4.v 167KB

README.txt 130B

IM.mif 528B

DM.mif 891B

RIUS_data.coe 308B

blk_mem_gen_0.mif 33B

ip.coe 208B

summary.log 902B

DM.sh 5KB

glbl.v 1KB

simulate.do 307B

compile.do 657B

README.txt 2KB

file_info.txt 407B

DM.mif 891B

RIUS_data.coe 308B

DM.udo 0B

wave.do 32B

summary.log 902B

DM.sh 7KB

glbl.v 1KB

simulate.do 11B

README.txt 2KB

file_info.txt 407B

DM.mif 891B

RIUS_data.coe 308B

summary.log 902B

DM.sh 6KB

elab.opt 196B

xsim.ini 22KB

cmd.tcl 464B

glbl.v 1KB

vlog.prj 135B

README.txt 2KB

file_info.txt 126B

DM.mif 891B

RIUS_data.coe 308B

summary.log 902B

README.txt 3KB

DM.sh 5KB

glbl.v 1KB

simulate.do 319B

compile.do 755B

README.txt 2KB

file_info.txt 407B

DM.mif 891B

RIUS_data.coe 308B

DM.udo 0B

wave.do 32B

summary.log 902B

DM.sh 5KB

glbl.v 1KB

README.txt 2KB

file_info.txt 407B

DM.mif 891B

RIUS_data.coe 308B

run.f 498B

summary.log 902B

DM.sh 5KB

glbl.v 1KB

README.txt 2KB

file_info.txt 407B

DM.mif 891B

RIUS_data.coe 308B

run.f 478B

summary.log 902B

DM.sh 5KB

glbl.v 1KB

simulate.do 307B

compile.do 671B

README.txt 2KB

file_info.txt 407B

DM.mif 891B

RIUS_data.coe 308B

DM.udo 0B

wave.do 32B

summary.log 902B

DM.sh 5KB

elaborate.do 191B

glbl.v 1KB

simulate.do 181B

compile.do 721B

README.txt 2KB

file_info.txt 407B

DM.mif 891B

RIUS_data.coe 308B

DM.udo 0B

wave.do 32B

summary.log 902B

IM.udo 0B

glbl.v 1KB

IM.mif 528B

simulate.do 307B

compile.do 657B

README.txt 2KB

file_info.txt 407B

wave.do 32B

IM.sh 5KB

ip.coe 208B

summary.log 902B

glbl.v 1KB

IM.mif 528B

simulate.do 11B

README.txt 2KB

file_info.txt 407B

IM.sh 7KB

ip.coe 208B

summary.log 902B

elab.opt 196B

xsim.ini 22KB

cmd.tcl 464B

glbl.v 1KB

IM.mif 528B

vlog.prj 135B

README.txt 2KB

file_info.txt 126B

IM.sh 6KB

ip.coe 208B

summary.log 902B

README.txt 3KB

IM.udo 0B

glbl.v 1KB

IM.mif 528B

simulate.do 319B

compile.do 755B

README.txt 2KB

file_info.txt 407B

wave.do 32B

IM.sh 5KB

ip.coe 208B

summary.log 902B

glbl.v 1KB

IM.mif 528B

README.txt 2KB

file_info.txt 407B

run.f 498B

IM.sh 5KB

ip.coe 208B

summary.log 902B

glbl.v 1KB

IM.mif 528B

README.txt 2KB

file_info.txt 407B

run.f 478B

IM.sh 5KB

ip.coe 208B

summary.log 902B

IM.udo 0B

glbl.v 1KB

IM.mif 528B

simulate.do 307B

compile.do 671B

README.txt 2KB

file_info.txt 407B

wave.do 32B

IM.sh 5KB

ip.coe 208B

summary.log 902B

elaborate.do 191B

IM.udo 0B

glbl.v 1KB

IM.mif 528B

simulate.do 181B

compile.do 721B

README.txt 2KB

file_info.txt 407B

wave.do 32B

IM.sh 5KB

ip.coe 208B

summary.log 902B

DM.veo 3KB

DM.vho 3KB

IM.vho 3KB

IM.veo 3KB

vivado_25352.backup.jou 948B

vivado.log 36KB

runme.bat 229B

.vivado.begin.rst 182B

IM.tcl 10KB

.vivado.end.rst 0B

dont_touch.xdc 1KB

runme.log 32KB

rundef.js 1KB

htr.txt 381B

project.wdf 4KB

__synthesis_is_complete__ 0B

IM_utilization_synth.pb 242B

.Vivado_Synthesis.queue.rst 0B

IM.dcp 29KB

vivado.jou 796B

vivado.pb 52KB

gen_run.xml 2KB

IM.vds 32KB

runme.sh 1KB

ISEWrap.js 7KB

ISEWrap.sh 2KB

IM_utilization_synth.rpt 6KB

RIU_CPU_top_drc_opted.rpx 45KB

runme.bat 229B

RIU_CPU_top_drc_routed.rpt 27KB

.vivado.begin.rst 181B

RIU_CPU_top_route_status.pb 44B

.route_design.begin.rst 182B

RIU_CPU_top_drc_routed.rpx 52KB

RIU_CPU_top_timing_summary_routed.rpt 9KB

RIU_CPU_top_route_status.rpt 588B

RIU_CPU_top.tcl 7KB

init_design.pb 3KB

.vivado.end.rst 0B

.init_design.end.rst 0B

RIU_CPU_top_clock_utilization_routed.rpt 24KB

RIU_CPU_top_bus_skew_routed.pb 30B

runme.log 69KB

RIU_CPU_top_placed.dcp 1.01MB

RIU_CPU_top_routed.dcp 1.28MB

RIU_CPU_top_timing_summary_routed.pb 52B

RIU_CPU_top_utilization_placed.rpt 9KB

RIU_CPU_top_opt.dcp 599KB

rundef.js 1KB

.opt_design.begin.rst 182B

.write_bitstream.begin.rst 182B

htr.txt 407B

.Vivado_Implementation.queue.rst 0B

RIU_CPU_top_power_routed.rpt 9KB

RIU_CPU_top_io_placed.rpt 97KB

.write_bitstream.end.rst 0B

RIU_CPU_top_methodology_drc_routed.rpt 185KB

usage_statistics_webtalk.html 41KB

write_bitstream.pb 44KB

RIU_CPU_top_bus_skew_routed.rpx 1KB

route_design.pb 12KB

vivado_14920.backup.jou 828B

RIU_CPU_top_drc_routed.pb 37B

RIU_CPU_top.bit 3.65MB

RIU_CPU_top_drc_opted.rpt 23KB

RIU_CPU_top_methodology_drc_routed.rpx 320KB

.place_design.begin.rst 182B

.route_design.end.rst 0B

project.wdf 4KB

RIU_CPU_top_timing_summary_routed.rpx 255KB

RIU_CPU_top.vdi 69KB

RIU_CPU_top_14920.backup.vdi 44KB

RIU_CPU_top_utilization_placed.pb 242B

usage_statistics_webtalk.xml 61KB

RIU_CPU_top_control_sets_placed.rpt 46KB

.opt_design.end.rst 0B

vivado.jou 827B

vivado.pb 149B

opt_design.pb 13KB

.init_design.begin.rst 182B

gen_run.xml 12KB

runme.sh 1KB

RIU_CPU_top_drc_opted.pb 37B

.place_design.end.rst 0B

RIU_CPU_top_power_routed.rpx 886KB

place_design.pb 45KB

ISEWrap.js 7KB

RIU_CPU_top_bus_skew_routed.rpt 910B

RIU_CPU_top_power_summary_routed.pb 722B

ISEWrap.sh 2KB

RIU_CPU_top_methodology_drc_routed.pb 53B

vrs_config_1.xml 354B

vrs_config_68.xml 348B

vrs_config_43.xml 362B

vrs_config_53.xml 369B

vrs_config_82.xml 369B

vrs_config_50.xml 369B

vrs_config_40.xml 362B

vrs_config_58.xml 348B

vrs_config_13.xml 369B

vrs_config_18.xml 362B

vrs_config_62.xml 354B

vrs_config_24.xml 362B

vrs_config_89.xml 348B

vrs_config_65.xml 586B

vrs_config_9.xml 362B

vrs_config_86.xml 348B

vrs_config_61.xml 369B

vrs_config_71.xml 348B

vrs_config_16.xml 369B

vrs_config_69.xml 362B

vrs_config_32.xml 348B

vrs_config_39.xml 578B

vrs_config_17.xml 348B

vrs_config_3.xml 348B

vrs_config_20.xml 348B

vrs_config_76.xml 369B

vrs_config_26.xml 348B

vrs_config_4.xml 348B

vrs_config_36.xml 354B

vrs_config_42.xml 348B

vrs_config_5.xml 362B

vrs_config_60.xml 362B

vrs_config_14.xml 348B

vrs_config_8.xml 348B

vrs_config_30.xml 362B

vrs_config_77.xml 348B

vrs_config_64.xml 354B

vrs_config_72.xml 362B

vrs_config_56.xml 362B

vrs_config_19.xml 369B

vrs_config_73.xml 369B

vrs_config_80.xml 348B

vrs_config_74.xml 348B

vrs_config_45.xml 348B

vrs_config_51.xml 578B

vrs_config_75.xml 362B

vrs_config_52.xml 362B

vrs_config_22.xml 369B

vrs_config_21.xml 362B

vrs_config_25.xml 369B

vrs_config_48.xml 348B

vrs_config_70.xml 369B

vrs_config_31.xml 369B

vrs_config_2.xml 354B

vrs_config_27.xml 362B

vrs_config_38.xml 354B

vrs_config_41.xml 369B

vrs_config_35.xml 376B

vrs_config_46.xml 362B

vrs_config_11.xml 348B

vrs_config_49.xml 362B

vrs_config_83.xml 348B

vrs_config_67.xml 845B

vrs_config_84.xml 362B

vrs_config_10.xml 369B

vrs_config_12.xml 362B

vrs_config_59.xml 348B

vrs_config_29.xml 348B

vrs_config_44.xml 369B

vrs_config_15.xml 362B

vrs_config_33.xml 362B

vrs_config_6.xml 369B

vrs_config_23.xml 348B

vrs_config_28.xml 369B

vrs_config_81.xml 362B

vrs_config_88.xml 369B

vrs_config_63.xml 586B

vrs_config_34.xml 369B

vrs_config_90.xml 362B

vrs_config_57.xml 369B

vrs_config_85.xml 369B

vrs_config_37.xml 354B

vrs_config_79.xml 348B

vrs_config_78.xml 348B

vrs_config_92.xml 354B

vrs_config_93.xml 845B

vrs_config_66.xml 354B

vrs_config_54.xml 354B

vrs_config_91.xml 369B

vrs_config_7.xml 369B

vrs_config_87.xml 362B

vrs_config_55.xml 578B

vrs_config_47.xml 369B

runme.bat 229B

.vivado.begin.rst 182B

RIU_CPU_top.vds 44KB

RIU_CPU_top.tcl 6KB

.vivado.end.rst 0B

dont_touch.xdc 285B

runme.log 44KB

rundef.js 1KB

htr.txt 399B

RIU_CPU_top_propImpl.xdc 5KB

__synthesis_is_complete__ 0B

RIU_CPU_top.dcp 427KB

.Vivado_Synthesis.queue.rst 0B

vivado.jou 823B

vivado.pb 75KB

gen_run.xml 7KB

RIU_CPU_top_utilization_synth.pb 242B

runme.sh 1KB

RIU_CPU_top_utilization_synth.rpt 7KB

ISEWrap.js 7KB

ISEWrap.sh 2KB

vivado_3996.backup.log 25KB

RIU_CPU_Reduced.xpr 17KB

vivado.jou 3KB

RIU_CPU_sim.v 516B

RIU_CPU_con.xdc 2KB

FR_Register.v 261B

B_Register.v 276B

F_Register.v 289B

PC0.v 390B

IR.v 364B

Register_heap.v 780B

ALU.v 959B

ID1.v 2KB

MDR.v 269B

Fdiv.v 296B

PC.v 409B

CU.v 7KB

LED_Tube.v 308B

ID2.v 2KB

RIU_CPU.v 2KB

Scanner.v 2KB

A_Register.v 276B

RIU_CPU_top.v 850B

Debounce.v 662B

ip.coe 208B

DM_stub.v 1KB

blk_mem_gen_v8_4.vhd 8KB

DM.vhd 14KB

DM_ooc.xdc 3KB

blk_mem_gen_v8_4_changelog.txt 7KB

DM_sim_netlist.v 28KB

DM_sim_netlist.vhdl 39KB

blk_mem_gen_v8_4.v 167KB

DM.veo 3KB

DM.mif 891B

DM.dcp 35KB

DM.v 6KB

DM_stub.vhdl 1KB

DM.vho 3KB

DM.xci 39KB

blk_mem_gen_v8_4_vhsyn_rfs.vhd 14.18MB

summary.log 902B

DM.xml 226KB

IM_stub.vhdl 1KB

blk_mem_gen_v8_4.vhd 8KB

IM.vhd 14KB

blk_mem_gen_v8_4_changelog.txt 7KB

IM.mif 528B

IM_stub.v 1KB

blk_mem_gen_v8_4.v 167KB

IM.xci 39KB

IM.vho 3KB

IM_sim_netlist.v 27KB

IM_ooc.xdc 3KB

IM.v 6KB

IM_sim_netlist.vhdl 38KB

IM.dcp 29KB

IM.veo 3KB

IM.xml 226KB

blk_mem_gen_v8_4_vhsyn_rfs.vhd 14.18MB

summary.log 902B

RIUS_data.coe 308B

vivado_19288.backup.jou 868B

vivado_19288.backup.log 1KB

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