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Configuration and Readback of Virtex FPGAs Using JTAG BoundaryScan
TheIEEE1149.1TestAccessPort(TAP)andBoundary-Scanarchitecture,commonlyreferredtoasJTAG,isapopulartestingmethod.JTAGisanacronymfortheJointTestActionGrou
Routability and Fault Tolerance of FPGA Interconnect Architectures
ThispaperpresentsanewapproachfortheevaluationofFPGAroutingresourcesinthepresenceofinterconnectfaults.Allpossibleinterconnectfaultsforprogrammableswitc
System Level Self_Healing
System Level Self-Healing for Parametric Yield and Reliability Improvement under Power Bound
A Survey of Fault Tolerant Methodologies for FPGAs
A wide range of fault tolerance methods for FPGAs have been proposed. Approaches range from simple architectural redundancy to fully on-line adaptive