xge_mac master.zip XGE MAC example deisgn for FPGA/CPLD, you can refer this source to design your own design.
usb_fs_phy.7z USB DEVICE FS mode controll and phy interface, you can refer this code for USB device design.
UART example design UART controller example design for your own design reference for FPGA/CPLD. This design very simple and easy for read.
NiosII_Dual_Core_restored.7z Nios CPU Dual Core example deisgn for Altera FPGA/CPLD , you can refer for CPU design.
dsi_controller master.zip DSI controller example design for FPGA/CPLD, you can refer for DSI interface design.