maxpain

基于FPGA的全数字锁相环设计，里面有基本的设计思想设计流程介绍

ECAT从站芯片ET1100说明书，SectionIII–HardwareDescription(SpecificESC)SectionIIIisESCspecificandcontainsdetailedinformationabouttheESCfeatures,implementedregis

Section I deals with the basic EtherCAT technology. Starting with the EtherCAT protocol itself, the frame processing inside EtherCAT slaves is describ

Section II contains detailed information about all ESC registers. This section is also common for all Beckhoff ESCs, thus registers, register bits, or

用FPGA实现的位同步电路设计，是CAJ文档，有基本的设计思想可以参考