DDR3_FIFO设计文档.doc
1.11MB
ISEWrap.js
7KB
runme.sh
1KB
vivado.pb
1KB
runme.bat
268B
ISEWrap.sh
2KB
vivado.jou
665B
htr.txt
391B
.vivado.begin.rst
188B
project.wdf
4KB
.Vivado_Synthesis.queue.rst
0B
wr_fifo.tcl
8KB
wr_fifo.vds
2KB
runme.log
2KB
rundef.js
1KB
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0B
gen_run.xml
1KB
dont_touch.xdc
2KB
ISEWrap.js
7KB
runme.sh
1KB
vivado.pb
1KB
mypll.tcl
8KB
mypll.vds
2KB
runme.bat
268B
ISEWrap.sh
2KB
vivado.jou
650B
htr.txt
387B
.vivado.begin.rst
188B
project.wdf
4KB
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0B
runme.log
2KB
rundef.js
1KB
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0B
gen_run.xml
1KB
dont_touch.xdc
2KB
ISEWrap.js
7KB
runme.sh
1KB
vivado.pb
1KB
rd_fifo.vds
2KB
runme.bat
268B
ISEWrap.sh
2KB
vivado.jou
665B
htr.txt
391B
.vivado.begin.rst
188B
project.wdf
4KB
.Vivado_Synthesis.queue.rst
0B
runme.log
2KB
rd_fifo.tcl
8KB
rundef.js
1KB
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0B
gen_run.xml
1KB
dont_touch.xdc
2KB
vrs_config_3.xml
208B
vrs_config_12.xml
212B
vrs_config_5.xml
224B
vrs_config_11.xml
212B
vrs_config_1.xml
244B
vrs_config_10.xml
212B
vrs_config_4.xml
224B
vrs_config_8.xml
212B
vrs_config_2.xml
208B
vrs_config_9.xml
212B
vrs_config_6.xml
208B
vrs_config_7.xml
212B
ISEWrap.js
7KB
runme.sh
1KB
mig_ddr3_crtl.tcl
9KB
vivado.pb
1KB
runme.bat
268B
ISEWrap.sh
2KB
vivado.jou
707B
htr.txt
403B
.vivado.begin.rst
188B
project.wdf
4KB
.Vivado_Synthesis.queue.rst
0B
runme.log
2KB
rundef.js
1KB
mig_ddr3_crtl.vds
2KB
.vivado.error.rst
0B
gen_run.xml
1KB
webtalk_pa.xml
10KB
project.wpc
62B
gui_handlers.wdf
13KB
java_command_handlers.wdf
3KB
synthesis.wdf
5KB
xsim.wdf
256B
ddr3.lpr
290B
ddr3_top_tb_behav.wcfg
28KB
ddr3.xpr
17KB
README.txt
130B
fifo_generator_v13_2_rfs.vhd
1.38MB
fifo_generator_v13_2_rfs.v
582KB
fifo_generator_vlog_beh.v
442KB
README.txt
3KB
elab.opt
196B
README.txt
2KB
file_info.txt
11KB
mig_a.prj
4KB
cmd.tcl
464B
xsim.ini
19KB
glbl.v
1KB
vlog.prj
8KB
mig_ddr3_crtl.sh
6KB
README.txt
2KB
mig_ddr3_crtl.udo
0B
file_info.txt
12KB
mig_a.prj
4KB
compile.do
9KB
elaborate.do
209B
glbl.v
1KB
wave.do
32B
simulate.do
203B
mig_ddr3_crtl.sh
5KB
README.txt
2KB
file_info.txt
12KB
mig_a.prj
4KB
run.f
8KB
glbl.v
1KB
mig_ddr3_crtl.sh
6KB
README.txt
2KB
mig_ddr3_crtl.udo
0B
file_info.txt
11KB
mig_a.prj
4KB
modelsim.ini
34KB
compile.do
8KB
glbl.v
1KB
wave.do
32B
simulate.do
319B
mig_ddr3_crtl.sh
5KB
README.txt
2KB
file_info.txt
12KB
mig_a.prj
4KB
glbl.v
1KB
simulate.do
11B
mig_ddr3_crtl.sh
16KB
README.txt
2KB
mig_ddr3_crtl.udo
0B
file_info.txt
12KB
mig_a.prj
4KB
compile.do
9KB
glbl.v
1KB
wave.do
32B
simulate.do
318B
mig_ddr3_crtl.sh
5KB
README.txt
2KB
mig_ddr3_crtl.udo
0B
file_info.txt
12KB
mig_a.prj
4KB
compile.do
9KB
glbl.v
1KB
wave.do
32B
simulate.do
318B
mig_ddr3_crtl.sh
5KB
README.txt
3KB
elab.opt
180B
README.txt
2KB
file_info.txt
340B
cmd.tcl
464B
xsim.ini
19KB
glbl.v
1KB
vlog.prj
217B
mypll.sh
6KB
README.txt
2KB
file_info.txt
588B
compile.do
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elaborate.do
193B
glbl.v
1KB
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mypll.udo
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187B
mypll.sh
5KB
README.txt
2KB
file_info.txt
624B
run.f
410B
glbl.v
1KB
mypll.sh
6KB
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2KB
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322B
modelsim.ini
34KB
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1KB
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32B
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5KB
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2KB
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624B
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7KB
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2KB
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588B
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1KB
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mypll.sh
5KB
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588B
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1KB
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294B
mypll.sh
5KB
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3KB
elab.opt
210B
README.txt
2KB
file_info.txt
130B
vhdl.prj
10B
cmd.tcl
464B
xsim.ini
19KB
glbl.v
1KB
wr_fifo.sh
6KB
vlog.prj
134B
README.txt
2KB
wr_fifo.udo
0B
file_info.txt
773B
compile.do
1KB
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223B
glbl.v
1KB
wave.do
32B
wr_fifo.sh
5KB
simulate.do
191B
README.txt
2KB
file_info.txt
773B
run.f
751B
glbl.v
1KB
wr_fifo.sh
6KB
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2KB
wr_fifo.udo
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file_info.txt
130B
modelsim.ini
34KB
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395B
glbl.v
1KB
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32B
wr_fifo.sh
5KB
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333B
README.txt
2KB
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773B
glbl.v
1KB
wr_fifo.sh
7KB
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11B
README.txt
2KB
wr_fifo.udo
0B
file_info.txt
773B
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1KB
glbl.v
1KB
wave.do
32B
wr_fifo.sh
5KB
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326B
README.txt
2KB
wr_fifo.udo
0B
file_info.txt
773B
compile.do
1KB
glbl.v
1KB
wave.do
32B
wr_fifo.sh
5KB
simulate.do
326B
README.txt
3KB
elab.opt
210B
README.txt
2KB
file_info.txt
130B
vhdl.prj
10B
cmd.tcl
464B
xsim.ini
19KB
rd_fifo.sh
6KB
glbl.v
1KB
vlog.prj
134B
README.txt
2KB
file_info.txt
773B
rd_fifo.udo
0B
compile.do
1KB
rd_fifo.sh
5KB
elaborate.do
223B
glbl.v
1KB
wave.do
32B
simulate.do
191B
README.txt
2KB
file_info.txt
773B
run.f
751B
rd_fifo.sh
6KB
glbl.v
1KB
README.txt
2KB
file_info.txt
130B
rd_fifo.udo
0B
modelsim.ini
34KB
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395B
rd_fifo.sh
5KB
glbl.v
1KB
wave.do
32B
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333B
README.txt
2KB
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773B
rd_fifo.sh
7KB
glbl.v
1KB
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11B
README.txt
2KB
file_info.txt
773B
rd_fifo.udo
0B
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1KB
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5KB
glbl.v
1KB
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32B
simulate.do
326B
README.txt
2KB
file_info.txt
773B
rd_fifo.udo
0B
compile.do
1KB
rd_fifo.sh
5KB
glbl.v
1KB
wave.do
32B
simulate.do
326B
mig_ddr3_crtl.veo
7KB
mypll.veo
4KB
wr_fifo.vho
4KB
wr_fifo.veo
3KB
rd_fifo.vho
4KB
rd_fifo.veo
3KB
mig_a.prj
4KB
mig_b.prj
4KB
mcrtl.v
4KB
ddr3_top.v
6KB
mux.v
2KB
ddr3_fifo.v
6KB
rd_crtl.v
3KB
wr_crtl.v
3KB
mig_ddr3_crtl.veo
7KB
xil_txt.in
1KB
mig_ddr3_crtl_ooc.xdc
2KB
mig_ddr3_crtl.xdc
13KB
log.txt
16KB
mig_ddr3_crtl_mig.v
58KB
mig_7series_v4_0_ddr_phy_rdlvl.v
144KB
mig_7series_v4_0_poc_edge_store.v
5KB
mig_7series_v4_0_ddr_calib_top.v
101KB
mig_7series_v4_0_ddr_phy_ocd_cntlr.v
10KB
mig_7series_v4_0_poc_top.v
16KB
mig_7series_v4_0_ddr_phy_dqs_found_cal.v
50KB
mig_7series_v4_0_ddr_phy_dqs_found_cal_hr.v
50KB
mig_7series_v4_0_poc_meta.v
12KB
mig_7series_v4_0_ddr_phy_ocd_samp.v
12KB
mig_7series_v4_0_ddr_phy_ocd_data.v
9KB
mig_7series_v4_0_ddr_byte_group_io.v
21KB
mig_7series_v4_0_ddr_phy_ck_addr_cmd_delay.v
9KB
mig_7series_v4_0_poc_pd.v
4KB
mig_7series_v4_0_ddr_of_pre_fifo.v
8KB
mig_7series_v4_0_poc_cc.v
8KB
mig_7series_v4_0_ddr_phy_tempmon.v
26KB
mig_7series_v4_0_ddr_phy_ocd_po_cntlr.v
21KB
mig_7series_v4_0_ddr_phy_ocd_lim.v
21KB
mig_7series_v4_0_ddr_if_post_fifo.v
8KB
mig_7series_v4_0_ddr_phy_wrlvl.v
49KB
mig_7series_v4_0_ddr_phy_prbs_rdlvl.v
245KB
mig_7series_v4_0_ddr_phy_ocd_mux.v
7KB
mig_7series_v4_0_ddr_phy_wrcal.v
53KB
mig_7series_v4_0_poc_tap_base.v
11KB
mig_7series_v4_0_ddr_skip_calib_tap.v
30KB
mig_7series_v4_0_ddr_phy_wrlvl_off_delay.v
9KB
mig_7series_v4_0_ddr_phy_ocd_edge.v
8KB
mig_7series_v4_0_ddr_mc_phy.v
88KB
mig_7series_v4_0_ddr_phy_init.v
237KB
mig_7series_v4_0_ddr_mc_phy_wrapper.v
70KB
mig_7series_v4_0_ddr_phy_oclkdelay_cal.v
25KB
mig_7series_v4_0_ddr_prbs_gen.v
29KB
mig_7series_v4_0_ddr_phy_4lanes.v
79KB
mig_7series_v4_0_ddr_phy_top.v
73KB
mig_7series_v4_0_ddr_byte_lane.v
32KB
mig_7series_v4_0_mem_intfc.v
43KB
mig_7series_v4_0_memc_ui_top_std.v
39KB
mig_ddr3_crtl_mig_sim.v
58KB
mig_7series_v4_0_ui_cmd.v
11KB
mig_7series_v4_0_ui_top.v
15KB
mig_7series_v4_0_ui_wr_data.v
21KB
mig_7series_v4_0_ui_rd_data.v
20KB
mig_7series_v4_0_iodelay_ctrl.v
13KB
mig_7series_v4_0_clk_ibuf.v
5KB
mig_7series_v4_0_infrastructure.v
30KB
mig_7series_v4_0_tempmon.v
15KB
mig_ddr3_crtl.v
7KB
mig_7series_v4_0_ecc_merge_enc.v
6KB
mig_7series_v4_0_ecc_dec_fix.v
7KB
mig_7series_v4_0_ecc_gen.v
8KB
mig_7series_v4_0_ecc_buf.v
6KB
mig_7series_v4_0_fi_xor.v
5KB
mig_7series_v4_0_bank_queue.v
23KB
mig_7series_v4_0_arb_select.v
26KB
mig_7series_v4_0_bank_cntrl.v
25KB
mig_7series_v4_0_rank_mach.v
12KB
mig_7series_v4_0_bank_compare.v
11KB
mig_7series_v4_0_round_robin_arb.v
7KB
mig_7series_v4_0_bank_mach.v
31KB
mig_7series_v4_0_bank_common.v
18KB
mig_7series_v4_0_bank_state.v
36KB
mig_7series_v4_0_arb_row_col.v
18KB
mig_7series_v4_0_col_mach.v
16KB
mig_7series_v4_0_rank_common.v
20KB
mig_7series_v4_0_mc.v
42KB
mig_7series_v4_0_rank_cntrl.v
22KB
mig_7series_v4_0_arb_mux.v
19KB
phy_only_support_readme.txt
608B
example_top.xdc
1KB
readme.txt
840B
log.txt
4KB
example_top.v
28KB
mig_7series_v4_0_read_posted_fifo.v
8KB
mig_7series_v4_0_traffic_gen_top.v
29KB
mig_7series_v4_0_rd_data_gen.v
12KB
mig_7series_v4_0_afifo.v
6KB
mig_7series_v4_0_write_data_path.v
7KB
mig_7series_v4_0_vio_init_pattern_bram.v
13KB
mig_7series_v4_0_s7ven_data_gen.v
38KB
mig_7series_v4_0_memc_flow_vcontrol.v
15KB
mig_7series_v4_0_tg_prbs_gen.v
11KB
mig_7series_v4_0_read_data_path.v
27KB
mig_7series_v4_0_cmd_gen.v
35KB
mig_7series_v4_0_data_prbs_gen.v
5KB
mig_7series_v4_0_tg_status.v
5KB
mig_7series_v4_0_init_mem_pattern_ctr.v
38KB
mig_7series_v4_0_wr_data_gen.v
13KB
mig_7series_v4_0_memc_traffic_gen.v
32KB
mig_7series_v4_0_cmd_prbs_gen.v
10KB
xsim_files.prj
13KB
ddr3_model_parameters.vh
269KB
sim.do
7KB
wiredly.v
5KB
ddr3_model.sv
163KB
xsim_run.bat
3KB
xsim_options.tcl
3KB
sim_tb_top.v
23KB
vcs_run.sh
5KB
readme.txt
10KB
ies_run.sh
5KB
datasheet.txt
2KB
mig.prj
4KB
mig_ddr3_crtl.xml
6.3MB
mig_ddr3_crtl_xmdf.tcl
16KB
mig_a.prj
4KB
tcl.log
15KB
mig_7series_v4_0_changelog.txt
7KB
mig_ddr3_crtl.xci
283KB
xil_txt.out
156B
mypll.veo
4KB
mypll_clk_wiz.v
7KB
mmcm_pll_drp_func_us_plus_mmcm.vh
31KB
mypll.v
4KB
mmcm_pll_drp_func_7s_mmcm.vh
24KB
mypll_ooc.xdc
2KB
mypll.xci
87KB
mmcm_pll_drp_func_7s_pll.vh
19KB
mmcm_pll_drp_func_us_pll.vh
18KB
mypll.xml
282KB
clk_wiz_v5_4_changelog.txt
7KB
mypll_board.xdc
60B
mmcm_pll_drp_func_us_mmcm.vh
24KB
mmcm_pll_drp_func_us_plus_pll.vh
19KB
mypll.xdc
3KB
fifo_generator_v13_2_vhsyn_rfs.vhd
2.34MB
blk_mem_gen_v8_4_vhsyn_rfs.vhd
14.18MB
fifo_generator_v13_2_rfs.vhd
1.38MB
fifo_generator_v13_2_rfs.v
582KB
wr_fifo.xml
587KB
wr_fifo.vho
4KB
wr_fifo.xdc
3KB
wr_fifo.v
15KB
fifo_generator_v13_2_changelog.txt
10KB
wr_fifo_clocks.xdc
4KB
fifo_generator_vlog_beh.v
442KB
wr_fifo.xci
69KB
wr_fifo.vhd
38KB
wr_fifo_ooc.xdc
2KB
wr_fifo.veo
3KB
fifo_generator_v13_2_vhsyn_rfs.vhd
2.34MB
blk_mem_gen_v8_4_vhsyn_rfs.vhd
14.18MB
fifo_generator_v13_2_rfs.vhd
1.38MB
fifo_generator_v13_2_rfs.v
582KB
rd_fifo.xdc
3KB
rd_fifo.xci
68KB
rd_fifo_ooc.xdc
2KB
rd_fifo_clocks.xdc
4KB
rd_fifo.v
15KB
fifo_generator_v13_2_changelog.txt
10KB
rd_fifo.vho
4KB
fifo_generator_vlog_beh.v
442KB
rd_fifo.xml
587KB
rd_fifo.vhd
38KB
rd_fifo.veo
3KB
ddr3_model_parameters.vh
269KB
ddr3_model.sv
163KB
ddr3_top_tb.v
1KB
xvhdl.log
0B
webtalk_14596.backup.jou
792B
ddr3_top_tb_vhdl.prj
75B
ddr3_top_tb_vlog.prj
9KB
mig_7series_v4_0_ddr_byte_group_io.sdb
21KB
mig_7series_v4_0_tempmon.sdb
12KB
mig_7series_v4_0_ddr_phy_ocd_edge.sdb
8KB
mig_7series_v4_0_bank_mach.sdb
37KB
mig_7series_v4_0_ddr_phy_ocd_lim.sdb
28KB
mig_7series_v4_0_ui_wr_data.sdb
20KB
mig_7series_v4_0_ecc_dec_fix.sdb
9KB
mig_7series_v4_0_ddr_mc_phy.sdb
118KB
mig_7series_v4_0_ecc_buf.sdb
7KB
mig_7series_v4_0_ddr_phy_ocd_mux.sdb
8KB
mig_7series_v4_0_bank_common.sdb
23KB
mig_7series_v4_0_bank_cntrl.sdb
23KB
mig_7series_v4_0_ddr_phy_prbs_rdlvl.sdb
416KB
mig_7series_v4_0_ddr_phy_top.sdb
90KB
mig_7series_v4_0_clk_ibuf.sdb
2KB
mig_7series_v4_0_ddr_phy_wrlvl.sdb
67KB
mig_7series_v4_0_ddr_phy_rdlvl.sdb
201KB
mig_7series_v4_0_ddr_prbs_gen.sdb
45KB
mypll.sdb
1KB
ddr3_model.sdb
271KB
mig_7series_v4_0_ddr_skip_calib_tap.sdb
43KB
mig_7series_v4_0_ddr_phy_init.sdb
292KB
mig_7series_v4_0_arb_row_col.sdb
23KB
ddr3_fifo.sdb
7KB
mux.sdb
2KB
ddr3_top_tb.sdb
3KB
ddr3_top.sdb
5KB
mig_7series_v4_0_ddr_calib_top.sdb
119KB
mig_7series_v4_0_ddr_phy_oclkdelay_cal.sdb
24KB
mig_7series_v4_0_rank_cntrl.sdb
23KB
wr_crtl.sdb
3KB
mig_7series_v4_0_iodelay_ctrl.sdb
10KB
mig_7series_v4_0_ddr_phy_ocd_po_cntlr.sdb
29KB
mig_7series_v4_0_bank_compare.sdb
14KB
mig_7series_v4_0_memc_ui_top_std.sdb
46KB
mig_7series_v4_0_poc_pd.sdb
3KB
mig_7series_v4_0_fi_xor.sdb
3KB
mig_7series_v4_0_ui_top.sdb
13KB
rd_fifo.sdb
19KB
mig_7series_v4_0_arb_select.sdb
44KB
mig_7series_v4_0_ddr_phy_ocd_cntlr.sdb
10KB
mig_7series_v4_0_round_robin_arb.sdb
4KB
mig_7series_v4_0_mc.sdb
43KB
mig_7series_v4_0_bank_queue.sdb
22KB
mig_7series_v4_0_arb_mux.sdb
20KB
mig_7series_v4_0_ddr_phy_ck_addr_cmd_delay.sdb
9KB
mcrtl.sdb
3KB
mig_7series_v4_0_poc_cc.sdb
10KB
mig_7series_v4_0_ddr_phy_ocd_data.sdb
9KB
mig_ddr3_crtl.sdb
5KB
mig_7series_v4_0_ddr_phy_wrlvl_off_delay.sdb
9KB
mig_7series_v4_0_rank_mach.sdb
10KB
mig_7series_v4_0_ddr_of_pre_fifo.sdb
9KB
mig_7series_v4_0_ddr_phy_dqs_found_cal.sdb
79KB
mig_7series_v4_0_ddr_phy_tempmon.sdb
27KB
xil_defaultlib.rlx
33KB
mig_7series_v4_0_ui_cmd.sdb
17KB
mig_7series_v4_0_col_mach.sdb
22KB
mig_7series_v4_0_ddr_phy_dqs_found_cal_hr.sdb
80KB
mig_7series_v4_0_ddr_phy_wrcal.sdb
84KB
mig_7series_v4_0_ddr_mc_phy_wrapper.sdb
105KB
mig_7series_v4_0_bank_state.sdb
44KB
mig_7series_v4_0_ddr_byte_lane.sdb
40KB
mig_7series_v4_0_ddr_phy_ocd_samp.sdb
13KB
mig_7series_v4_0_poc_edge_store.sdb
4KB
mypll_clk_wiz.sdb
5KB
mig_7series_v4_0_poc_top.sdb
16KB
mig_7series_v4_0_ecc_merge_enc.sdb
7KB
mig_7series_v4_0_poc_meta.sdb
16KB
mig_7series_v4_0_rank_common.sdb
26KB
mig_7series_v4_0_ui_rd_data.sdb
19KB
wr_fifo.sdb
19KB
glbl.sdb
4KB
mig_7series_v4_0_ddr_phy_4lanes.sdb
114KB
mig_7series_v4_0_ecc_gen.sdb
7KB
rd_crtl.sdb
3KB
mig_7series_v4_0_ddr_if_post_fifo.sdb
8KB
mig_7series_v4_0_infrastructure.sdb
27KB
mig_7series_v4_0_poc_tap_base.sdb
12KB
mig_ddr3_crtl_mig.sdb
45KB
mig_7series_v4_0_mem_intfc.sdb
51KB
xsim.svtype
8B
xsimcrash.log
1KB
TempBreakPointFile.txt
29B
xsim.dbg
1.37MB
xsim.xdbg
512KB
xsim_11.c
1.2MB
xsim_8.win64.obj
1.27MB
xsim_6.win64.obj
1.06MB
xsim_3.win64.obj
1020KB
xsim_1.win64.obj
1017KB
xsim_10.c
995KB
xsim_9.win64.obj
916KB
xsim_4.win64.obj
1.13MB
xsim_2.win64.obj
982KB
xsim_0.win64.obj
1.02MB
xsim_11.win64.obj
776KB
xsim_5.win64.obj
1.23MB
xsim_10.win64.obj
647KB
xsim_7.win64.obj
1.12MB
xsimk.exe
9.2MB
xsimkernel.log
339B
xsim.type
24B
vxsimk.ico
0B
xsim.mem
2.7MB
ddr3_top_tb_behav_1744_1579078726.btree
2.29MB
xsim.rtti
800B
xsimSettings.ini
740B
usage_statistics_ext_xsim.html
3KB
usage_statistics_ext_xsim.xml
3KB
.xsim_webtallk.info
66B
Compile_Options.txt
293B
xsim.svtype
170B
xsim.reloc
3.22MB
xsim.rlx
1KB
vxsimk.exe
9.02MB
xvlog.log
0B
webtalk_7092.backup.log
880B
webtalk_10796.backup.log
861B
ddr3_top_tb.tcl
460B
xvlog.pb
16B
webtalk.jou
811B
simulate.bat
859B
webtalk_14596.backup.log
861B
webtalk_2404.backup.log
860B
webtalk_7092.backup.jou
811B
compile.log
0B
webtalk_13944.backup.log
881B
xsim.ini
19KB
ddr3_top_tb_behav.wdb
3.51MB
elaborate.bat
950B
glbl.v
1KB
webtalk_10796.backup.jou
792B
elaborate.log
3KB
xvhdl.pb
16B
simulate.log
329KB
xelab.pb
5KB
webtalk_13944.backup.jou
812B
webtalk_2404.backup.jou
791B
xsim.ini.bak
19KB
webtalk.log
880B
compile.bat
1KB
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