在FPGA中用verilog实现开方运算
(预估有个103文件)
sqrt_top_summary.html
11KB
SQRTpath_summary.html
4KB
sqrt_top.bit
1.68MB
binbcd8.bin
3KB
_s_q_r_tctrl.bin
5KB
sqrt__top.bin
4KB
_s_q_r_t.bin
3KB
clkdiv.bin
2KB
regr2.bin
3KB
_s_q_r_tpath.bin
6KB
mux2g.bin
2KB
sqrt_top.bld
1020B
sqrt_top.bgn
7KB
sqrt_top.drc
187B
SQRT.gise
13KB
sqrt_top_envsettings.html
12KB
SQRT_summary.html
4KB
sqrt_top.cmd_log
2KB
usage_statistics_webtalk.html
42KB
sqrt_top_pad.csv
38KB
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