用FPGA模拟VGA时序,PS_2总线的键盘接口VHDL源代码.7z
(预估有个78文件)
用FPGA模拟VGA时序,PS_2总线的键盘接口VHDL源代码
S3Demo
xst
work
hdllib.ref
604B
hdpdeps.ref
1KB
sub00
vhpl04.vho
2KB
vhpl07.vho
7KB
vhpl06.vho
2KB
vhpl00.vho
962B
vhpl05.vho
7KB
vhpl02.vho
1KB
vhpl03.vho
9KB
vhpl01.vho
6KB
s3demo.bgn
5KB
s3demo.twx
17KB
s3demo.ngm
169KB
README.txt
509B
s3demo_pad.txt
39KB
s3demo.nc1
37B
s3demo.stx
0B
s3demo_pad.csv
10KB
s3demo_map.ncd
18KB
s3demo_last_par.ncd
30KB
coregen.log
686B
S3demo.npl
636B
S3demo.lfp
1KB
s3demo.pad
10KB
__projnav.log
64KB
s3demo.twr
4KB
s3demo.routed_ncd_tracker
0B
s3demo.placed_ncd_tracker
0B
S3demo.ucf
1KB
S3demo.sig
237B
s3demo.ngc
52KB
_impact.cmd
1KB
s3demo.drc
38B
S3demo.prm
647B
_ngo
netlist.lst
52B
s3demo_cclktemp.bit
207KB
s3demo.ut
486B
s3demo.par
6KB
coregen.prj
10KB
s3demo.cmd_log
1KB
s3demo.ngr
47KB
S3demo.mcs
583KB
automake.log
0B
_impact.log
8KB
S3demo.ucf.untf
0B
s3demo.bld
659B
README.txt~
0B
bitgen.ut
486B
s3demo.ngd
78KB
s3demo.prj
69B
s3demo.ncd
30KB
s3demo.lso
6B
s3demo.syr
25KB
_pace.ucf
520B
s3demo_map.ngm
169KB
s3demo.mrp
11KB
s3demo.bit
207KB
kb2vhdl.vhd
4KB
vga_main.vhd
4KB
s3demo.xpi
46B
__projnav
S3demo_flowplus.gfl
532B
map.log
190B
s3demo_ncdTOut_tcl.rsp
18B
bitgen.rsp
486B
pegasusdemo.xst
985B
runXst_tcl.rsp
69B
par.log
153B
ednTOngd_tcl.rsp
57B
pegasusdemo_ncdTOut_tcl.rsp
18B
S3demo.gfl
10KB
posttrc.log
212B
nc1TOncd_tcl.rsp
12B
coregen.rsp
110B
s3demo.xst
965B
S3demo.vhd
5KB
S3demo.dhp
4KB
s3demo.pcf
2KB
s3demo.pad_txt
39KB
暂无评论