xhreynolds

virtio1.2spec

virtio1.2spec有需要的可以看看

pcie5.0_base_spec

pcie5.0/ Readiness Notification/M-PCIe/Precision Time Measurement

IEEE1801UPF2.0.pdf

UPF2.0 standard, low power IC design, IEEE Standard for Design and Verification of Low Power Integrated Circuits

verilog testbench编写方法

verilog编写testbench的注意事项，有实例辅助说明

串口中断服务子程序51系列

串口中断服务程序及相关寄存器设置，相关的说明见程序注释